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Nathaniel M.
Digital Designer at Northrop Grumman
Nathaniel M. is an experienced lead verification engineer based in Baltimore, MD, with a strong background in working on large ASIC SoC projects.
Nathaniel holds a Master of Science degree in electrical and computer engineering, earned in May 2009, and a Bachelor of Science in ECE with a minor in mathematics, attained in May 2008.
His expertise lies in functional verification using UVM and SystemVerilog, as well as RTL design for FPGAs and ASICs in VHDL and Verilog.
Nathaniel also has programming skills in languages like C++, C, and Java, along with proficiency in scripted and mathematical languages such as TCL and Matlab.
His experience extends to circuit board design, working in labs, and demonstrates strong leadership qualities through various professional and volunteer roles.
With a keen interest in verification, design for ASICs and FPGAs, and embedded systems, Nathaniel excels in communication and team collaboration within technical environments.
