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    Nagarjuna Udutha

    Staff Engineer at Qualcomm

    Nagarjuna Udutha is an experienced professional in ASIC Verification, specializing in developing System Verilog/Universal Verification Methodology (UVM) Test benches from scratch, designing testplans for complex ASICs, and achieving functional coverage closure, with additional expertise in DPI-C SCE-MI Emulation compatible UVC development.

    He pursued his education in the field of VLSI and Embedded Systems, earning a Master's degree from the International Institute of Information Technology and a Bachelor's degree in Electronics and Communication from Jawaharlal Nehru Technological University.

    Nagarjuna has held significant roles in various renowned organizations, currently serving as a Staff Engineer at Qualcomm. Previously, he worked as a Lead Engineer and Senior Design Engineer at Qualcomm, as well as in positions like MTS-Verification and Verification Engineer at Vitesse Semiconductor, now known as Microsemi. He also gained experience as a Verification Intern at NVIDIA.

    Nagarjuna Udutha
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    Location

    Bengaluru, Karnataka, India