Xia Li

Xia Li is a highly skilled digital Firmware/ASIC designer with a specialization in DSP processor architecture and high throughput digital signal processing design. With a membership in the IEEE as a Senior member, Xia has a strong background in LTE and modem design/verification, VHDL and Verilog, RTL simulation and verification, Matlab, C, C++, configuration management tools like Clearcase and GIT, and scripting languages such as TCL, Python, and Perl. Additionally, Xia is proficient in working within a Linux environment and possesses exceptional debug and analytic skills.

Xia Li's educational background includes a Master's degree in FPGA implementation of Digital Signal Processing from the University of Electronic Science and Technology of China, as well as Ph.D. studies in Ultra-Wideband Wireless Communication from Tennessee Technological University and Electrical Engineering from Stevens Institute of Technology. Xia also attended No. 5 Middle School in Chengdu, China.

With a diverse professional history, Xia Li has held the position of Senior Modem DSP Firmware Engineer at Apple, demonstrating expertise in firmware engineering. Prior to this role, Xia served as a Staff Engineer at Qualcomm and gained research experience as a Research Assistant at both Tennessee Technological University and the University of Electronic Science and Technology of China.