The University of Manchester

Product Engineering Director at Graphcore

Graphcore

VP of Product Test and Diagnostics

Focusing on my core competance as the company grows

Director of Product Test and Diagnostics

Responsible for semiconductor package, test, product and manufacturing engineering.

Product Engineering Director

PF Consulting (UK)

Owner

I led the integration of the Icera operations engineering functions into NVIDIA. The vehicle for this was a chipset made up of a 28nm digital and a 65nm RF chip, which were at their very early stages at the time of acquisition. 

As this progressed, my responsibilities shifted away from direct control of engineering towards cross-functional leadership, coordinating all activities within NVIDIA that contributed to manufacturing of my products, together with direct responsibility for the modelling and management of product unit costs. 

Since early 2014, as the company’s modem offering extended from chips to modules (small, PCB based systems) for commercial and automotive applications, my responsibilities extended to include manufacturing and reliability engineering of these systems.

My mission was formally defined thus: “Ensure the design of modem chips and modules that are manufacturable and ensure the setup and operation of a scalable production manufacturing process that delivers products that meet end market quality requirements, business unit cost requirements and customers' delivery requirements”.

NVIDIA

Silicon Operations General Manager, Modem Products

Founded in 2003, over the following 7 years Icera raised $250M of venture funding to develop modem chipsets for 2G, 3G and 4G cellular standards. Through this time ~15 million chipsets were sold. In 2011 the company was acquired by NVIDIA for $367M in cash. 

Through this time I was responsible for manufacturing operations engineering of silicon products, covering Digital, Mixed Signal and RF CMOS at process nodes down to 28nm. All direct manufacturing activities were subcontracted, mainly to the Far East, on a "Customer Own Tooling" model.

In carrying this out I was directly responsibility for the following functions: Foundry Engineering, Package Design, Assembly Engineering, Test Engineering, Product Engineering (New Product Introduction and High Volume Production), Reliability Engineering, Quality Engineering and NPI Program Management. 

Being part of a very small team meant that in addition to being the manager, I carried out much of the hands-on work both within and beyond the aforementioned areas, including chip design, DFT, ATPG, material composition analysis, environmental standards conformance, and so on.

Icera

Director of Product Engineering

Responsible for operations engineering of a series of highly integrated DSP processors for DSL Central Office applications, built in 0.15um and 0.13um CMOS. In the early days I also drove the top-level physical design of the first product, requiring the integration of 19 separate blocks of physical design into the chip’s top level; as a part of this work I contributed to US patent 6766503.

Broadcom

Product Engineer

Element 14

Product Engineering Manager

I provided application engineering and consultancy services to HP93000, HP83000 and HP82000 digital and mixed signal test system users in Europe and Israel. My main responsibilities were: on- and off-site consultancy; test program translation; sales technical support; training course delivery; project management.

Agilent Technologies

Field Applications Engineer

Hewlett-Packard Ltd

Test and Product Engineer for: SRAMs up to 1Mbit (to 1991), PC Graphics Accelerators / RAMDACs (to 1995), Microprocessors / Microcontrollers and Audio Frequency Mixed Signal products (to 1998).

Paul Freeman