Indian Institute of Technology, Delhi

Engineering Leader at Stripe  -  ex-Apple

Stripe

Senior Engineering Leader

Siri Text to Speech (TTS) team is responsible for the voice of Siri. The TTS team owns the entire voice pipeline including studio recordings, audio processing, machine learning models for audio synthesis, the TTS engine running on iOS/macOS devices, and has enabled Siri to speak in dozens of voices on all major hardware platforms (iPhone, iPad, Mac, Apple Watch, HomePod). These high quality voices are being used for Siri along with Accessibility and VoiceOver applications.

- My teams worked on improving Siri by creating automated data pipelines including crowd grading and analysis for several critical machine learning applications
- We created several full-stack applications to allow language engineers to analyze large data sets, and identify and fix errors in Siri
- We built an internal iOS app using SwiftUI to report mispronunciations by Siri which exported the data to cloud database to make it available to language engineers using a web application
- Also built a React app integrated with Neural text-to-speech ML models to allow audiobook synthesis from published books
- DRI for enabling the text-to-speech neural engine on Apple Watch and HomePod, which required deep analysis and optimizations on every layer from machine learning models to kernel and virtual memory
- Previously I also worked on architecture, design, definition, and implementation of Apple’s iPhone Accessory Protocol for accessories. This protocol is being used by hundreds of millions of accessories including most Car Head Units, Speaker Docks, and Apple branded accessories
- Proposed many innovative product ideas, and drove them all the way from initial concept to final implementation. Filed patents related to various operations of mobile devices. Link to some of the granted patents: http://patents.justia.com/inventor/shailesh-rathi
- Part of the core technical team for several critical cross-functional efforts including CarPlay, Apple Watch, and Apple branded accessories

Apple

Senior Manager, Siri Text to Speech Applications Engineering

Verification IP for USB
- Chief architect for the USB Verification IP, which became the industry-leading
product overtaking many existing competitors
- Managed the product development from scratch starting from customer discussions, creating delivery timelines, to managing the engineering efforts, and guiding the team
- Responsible for all major customer engagements, provided technical roadmaps and demos, and helped in winning a number of big accounts in important evaluations
- Managed the verification partnership effort with a company providing USB RTL, and supervised the consultants from the partner company
- Implemented the protocol layer, ULPI Interface, USB Hub support, and a lot of advanced verification features like bandwidth management, automatic frame generation, sophisticated error injection, etc
- Established an XML based Docbook methodology for automatic API generation for multiple languages

Firmware Development For NAND Flash file system
● Designed the co-verification environment for the Flash Controller, ARM CPU & Firmware
● Implemented several key algorithms to improve NAND flash performance (wear leveling, read/write speeds, etc)

Denali Software

Engineering Manager

- Responsible for the infrastructure layer of all of Monterey's design tools - Calypso (a design planning
and floorplanning tool) and Dolphin (a physical implementation tool)
- Led the infrastructure team that was responsible for the import/export of all major EDA
formats in Calypso, and provided database storage and retrieval
- Significantly improved the memory usage and performance of in-memory and on-disk representation of the design data which led to a 4x improvement in performance
- Worked on the implementation of a new client-server based common database
representation to share data between various tools

Monterey Design Systems

Project Lead

- Worked on Tharas' Hammer Accelerator, and implemented a number of advanced algorithms
- Created a distributed system to run large number of parallel simulations across multiple servers and multiple cores to reduce run times by 10x

Shailesh Rathi