Kirit Patel

Kirit Patel is a skilled professional with a strong background in the development of VME based Timing systems. He has contributed significantly to the field of Semiconductor technology and research, particularly in disposable VLSI and nanotechnology for future Integrated Circuits. With expertise in FPGA, VHDL, Verilog, C, and Microcontrollers, Kirit Patel has extensive experience in the design and implementation of advanced technologies. He holds a Master of Science in Electrical Engineering with a specialization in VLSI from the University of Rochester, complemented by a Bachelor of Engineering in Electronics and Communications Engineering from Government Engineering College.