James Garland

James Garland is a highly-skilled researcher and engineer with an impressive background in machine learning, software, FPGA, and IC design. With years of experience in digital SoC/IP ASIC, FPGA, PCB, and software design and testing, James has proven himself to be a competent project manager, team and technical leader. Alongside his engineering work, James is also a lecturer and research supervisor at a prestigious Irish University and Institute of Technology. His educational background includes a MSc in System Design (Microelectronic), a BEng (Hons) in Engineering (Electrical/Electronic), and a HND in Electrical/Electronic Engineering.

As a PhD candidate at Trinity College Dublin, James specializes in project management, HDL RTL IP digital design and test, software test, and PCB design targeted at ASIC and FPGA. His teaching and research focus on embedded hardware design and testing provides students with valuable expertise in these highly sought-after areas. In summary, James Garland is an accomplished researcher and engineer who brings a wealth of experience and knowledge to his work in the fields of machine learning, software, FPGA, and IC design.