Fernando Parillo

Fernando Parillo is a renowned Italian Engineer with years of expertise in Electrical and Information Engineering. He holds a Degree in Electrical Engineering from the University of Naples and a Ph.D. degree in Electrical and Information Engineering from the University of Cassino where he is currently a Research Assistant. Dr. Parillo has a rich history of participating in legislative processes to promote favorable policies for Research Assistants. His research interests revolve around the development of control strategies regarding electrical drives, power electronic converters, and their subsequent µP, DSP and FPGA implementation. He has authored several scientific publications concerning his research activities which have gained recognition in his field. Dr. Parillo has also developed a custom sfloat24 math library on FPGAS using VHDL language to enhance the use of IEEE 754 standard. Currently, he is focused on software development concerning STMicroelectronics STM32 Nucleo microcontrollers family.