Saurabh Upadhyay is an accomplished Electrical Engineer with a wealth of experience in the VLSI design and micro-architecture. He has extensive knowledge of digital logic implementation and validation, using Verilog and System Verilog. Additionally, he is proficient in automated code generation using Perl, and has a strong understanding of back-end tools for hardware design. Mr. Upadhyay has studied at both Illinois Institute of Technology, where he earned his Master of Science degree, and Sardar Patel University, where he earned his Bachelor of Engineering degree. He currently serves as SMTS Silicon Design Engineer at AMD, having previously worked as a Graphics Hardware Engineer and Component Design Engineer at Intel Corporation.