Besser assciates

AT&T Bell Labs advanced Electrical Engineering MBA courses

Theological Study

RETS ELECTRONICS INSTITUTE

Valley Forge Military Academy & College

Devon Prep

VFMA, Bell Labs, RETS

AT&T Bell Labs SONET CHIP SET. High Energy Laser Weapons, Millimeter Wave, Senior Electro-Optical Manager,  Process and Electrical Engineer at High Energy Projected Beam Weapons

Austin, Texas, United States

High Energy Projected Beam Weapons

Senior Electro-Optical Process and Electrical Engineer

Skorpios Demonstrates Industry-First 100G System-on-Chip, Fully Integrated Opto-electronics Rx and Tx ICs (S-xoC).Presented successful Wafer Burn in Laser Aging system, Entire wafer aged at one time.  All lasers require agind to stabilize them.  Worked with Aher Fox to develop our system and successfuly present it for integration into our process. I just finished building a single mode fiber to laser waveguide aligner with 1 nano meter precision.  Works beautifully.  to understand this: a bacterium is 2,500 nanometers, a strand of yout hair is 100,000 nano meters in diameter.Skorpios Technologies is vertically integrated  semiconductor company, delivering highly integrated communications products based upon our proprietary, wafer-scale, silicon photonics process.Skorpios has acquired the  semiconductor fab it had been using, the former Sematech fab in Austin Texas.  Taking advantage of Vertical Integration to lead the way in fiber optic development.This novel platform process leverages the existing silicon manufacturing ecosystem to enable high bandwidth interconnectivity at mature CMOS manufacturing costs. Skorpios’ unique platform can be used to address a wide range of applications: high-speed video, data and voice communications for networking and cloud computing, storage, wireless and cable TV.

Skorpios Technologies, Inc.

Manager of Engineering

Develope program for the homelessLab Validation test required automation development:Research New Product VectorsDevelop Software  Automation (genric Vi's) for use with Ni Test StandDevelop PXE Test resource matrix to interface to DUT engineering test board.Develop test hooks into Engineering test boards.

Research Gate

Advanced Research Scientist

As i perform my work, i work within the system and company constraints to improve or even fix process, products and methodologies, by my system of investigation and analysis.  I work with all the talents available and some outside, i gain and use ad direct their individual knowledge in a team effort from a system overarching level viewpoint.Contract work 2016design lego building block interface for Ni lab and teststand semiconductor validation test system.  Easily re configurable and open architecture for debugging easily.  ResearchGate 2013 to presentConduct research in Theology, global warming, semiconductor fab and yield optimization,  develop revolutionary program to help rebuild homeless people.  Research new methods of Silicon Validation (FPGA, Ni Teststand, Arduino) semiconductor test and emulation, Mixed signal test vector generator etc.AT&T Bell Labs: Bring up $1B semiconductor foundry, turn SBU around from least profitable at AT&T to most profitable at $250M profit on $500M sales in GaAs, most difficult semicon tech to manufacture in. Defense Electronics 1986New Product failing acceptance test,  ten band double mixer frequency converter module failing for an out of tolerance  spur on the 3rd band, designed a ceramic resonator narrow band filter (which had been designated impossible by our chief scientist)  to fix the problem and prevent large penalty for default of performance.  Implemented the fix in the existing packages, saving $ 2 million dollars in re tooling.Built Rack and Stack spurious analysis tester using a tracking spectrum analyzer with a tracking Yig filter and synthesizers and wrote software to identify out of band spurs and identify their M by N product.Attending Networking EventsResearching Industry LeadersTracking Industry TrendsParticipating in Industry Discussions

Semiconductor NPI in the Austin, Texas Area

Founder  -  Director  -  Manager  -  NPI  -  Software  -  Data  -  Semiconductor  -  New Silicon Vaidation

Sole responsibility for New Product Bring Up : Real Time Video Switcher at Bell Labs, Semiconductor Test Solution Development ExperienceAnalog and Digital Test Solutions, RF, Microwave, Mixer, Electronic Warfare Microwave modules, Fiber Optic chip set. .Specialties: Semiconductor NPI, Manufacturing, Startup, Process Definition, Yield enhancement, cost reduction planning, staging product to minimum cost, increased profitability at AT&T from loosing money to returning 50 percent of sales to the bottom line, in one of the most difficult process and products in the world.. GaAs Fiber chip set.Audio Research Addendum: I developed sound system, based on the human audio cortex processing of audio, Recording media must compress sound to fit, missing are the spatial cues from reflections.  The small details close to the noise floor also are suppressed.Acoustic frequency selective ques are added in as well, which adds in the effect of wet sampling to dry sampled recordings. The effect is to reduce listener fatigue and to add back in the nuances of each instrument, the bow of the violin string, the sharp strike of the piano hammer, the breath of the wind instruments, etc.--------------------------------------------My first Semiconductor project in electronics was to build an in circuit transistor tester analyzer.  I used negative logic.  leads were applied at random orientation, tester scanned the transistor to find the correct orientation and type of transistor and it indicated the lead definition and type with an LED display.

Career Accomplishments

CONSULTANT

Sole contributor for Product management and test for New Product Introduction from first concept to full production release, includes testability, DFT, tets hardwarre and ATE, Lab Validation, Qual, corner lot validation, test flow, test development, test interface, qual test interface and FA, taking product through  Engineering, Initial Production, Pre Production and Final Production phase. Lab validation and test instrument and ATE development to meet test requirements.  Work with designers to determine test requirements, write test reports and proposals, set cpk's ,complete data sheet•	Quality / Productivity: We had parts failing at the customer location.  Our team thought it was die crack propagation.  I looked more closely at the X-Ray and found the cracks did not propagate  past the seal ring. I  found the failure more consistent with ESD damage.  I used a field meter to prove that ESD voltage was building up in the Torlon end effector of the test handler;  after some re design of the kits.  I implemented a test chamber ionizer and restored full production .  •	Semiconductor Test & Measurement: Our production phase noise instruments were at end of life.  The closest instrument I could find was Agilent E50502.  It however did not have a low enough noise floor.  I specified a digital filter modification I needed to Agilent and they created the firmware according to my specifications.  I was able to get jitter for OC48 and OC192 SONET IP rates with one acquisition at less than 300 mS, returning 320 pico second  jitter..•	Risk Mitigation / Quality: As NPI engineer for the world’s first viable any rate clock and also the first any rate crystal less oscillator…. I was responsible for full manufacturing and risk mitigation.  I specified and installed a central NIST primary clock reference, using a Rubidium atomic clock and GPS disciplining to guarantee parts were being set to the correct frequency, verified on a continuous basis.

Silicon Laboratories

Semiconductor  -   New Product Introduction  -  NPI  -   Software  -  Product  -  Test  - 

I routinely bring up new technology, take it into final production, perform all the steps needed, where there is no bridge, i build one.I have determined the need for and defined and deployed a high level PRIMARY NIST timing reference for our Any Rate clock, which provides  a true Primary NIST timing reference. Design Board tester and software for off shore XTAL manufacturer to test and characterize our Crystals (third order overtone).  Design inline bowl tester to power up IC/xtal and test output on bowl handler, sense current and run test since no GPIB control, proprietary xtal tester from Japan... issue pass/fail control voltage signal. interface to proprietary handler, no manufacturer support availableDefine and create the protocol for short Temp versus frequency ramp for LC only oscillator, 500 millisecond temperature ramp to calculate polynomial correction coefficients to correct the frequency drift with temperature.  World calls test and characterize speed for a temperature compensated oscllator.New product bring up1. define QA tests required.2 Design QA hardware, submit to vendor for prodution3. Perform QA tests, analyze data, perform FA and resolve any failures.4 Select Test platform and protocols to meet Cost Bulletin5. Write test software6. Bring up testing, resolve part/tester fails.7. Collect, present and analyze Engineering  test data.8. Confirm conformity to cost bulletins, correct and out of tolerance deviance.9. Set up test executive and linkage to ordering database for automation, take device through pre production.10. Resolve any last issues and put part into production.11. transfer operations off shore.

EXPERIENCE

Semiconductor  -   New Product Introduction  -  NPI  -   Software  -  Product  -  Test  -  Yield Optimization

- developed and deployed changes to create $250M profit on $500M sales. Our business unit was loosing money on every product sold, i was told not to try to fix it, others had tried for years and failed.. as a result of my pioneering work we became the most profitable division of Bell Labs with $250M in profits. •	GaAs Semiconductor NPI production fab bring up($ 1B project) : I called a meeting and after two years of waiting for the Wireless SBU failed  bring our fab up at TriQuint, I informed our GM, that my wafer storehouse was almost depleted and that we needed to take it over immediately, I was asked by GM and Chief Scientist with to lead the team  to Bring up our $1B  fab, which we transferredto TriQuint OR.  This is one of the world’s most complex Semiconductor fab processes (SARGIC HEMPT EPI III/V GaAs semiconductor) i used my previous work from our SBU turn around. . Over the course of 90 days i set the task, targets and negotiated corrective actions,  our team  Achieved a new first in wafer yield at 98 percent. •	GaAs Semiconductor NPI :wafer probe (up to 80 GHz) for the longlines fiber optic chip set. the test executive was a Bell Labs creation.  It hung all the time and was not intuitive to use.  I rewrote the entire program (500,000 lines added  500,000 lines) after that it worked flawlessly, any operator could use it, it configured itself by the lot traveler) it prevented damage to probe cards and it provided full  on line statistics.•	GaAs Semiconductor NPI Testing: Our C level manager asked if I could develop a tester for a new project, OC48 SONET Transceiver chip set for high volume and low cost, everyone else told him it could not be done. I said I could do it and told him how.  I Built the world’s first Hybrid ATE tester with LTX to  meet high volume low cost of test bulletin Project $3.2M budget, creating a new standard for telecommunication testing.  Test time reduction and throughput provided a 1 year pay back.

AT&T

AT&T  -  Bell Labs Semiconductor  -   Product  -  ATE Test  -  New Product Introduction  -  NPI  -    Lab test

I taught the Evening Division Electrical Engineering Courses after graduation, i had a 4.0 and was invited to teach.  I also worked during the day at AEL (American Electronic Laboratories) /Hughes in Electronic Warfare

RETS COLLEGE

Professor Associate level Electrical Engineering Theory, Math Courses, evening division

- Product Redesign: Called upon to fix a failure in our new warfare module  after 9 months of part failures risked the loss of a significant military contract and associated penalties. I was told it was a lossy RF line. I designed and built a special RF Probe and discovered the true cause, which was not a lossy line but LO leakage at a notch filter in the circuit.. . I designed new ceramic resonator filter to prove it and then I showed my boss, who then told me they did not include the notch filter, which had been specified by the Naval Research Labs,  because the chief scientist said it was too hard to design and would not work.  My filter design worked perfectly and was put into production.  I saw it working in the gulf war when SAM missiles were  not hitting our pilots. •	Customized Testing / Validation: My boss told me that we were second source for a SUBACS memory hybrid module.  We could not afford an ATE test set, so we decided to build our own tester out of a Commodore 64 (a lot like today’s Arduino) My boss trusted me to design it, I used memory mapped IO coupled with Transmission gates in my test system design.. Interfaced an access time tester and acquired pass-fail test vectors, expanded test procedures, and designed and built hardware and software, I wrote the test vectors in Assembly to speed up testing. Created thermal test chamber and added debug test routines, retest test flows and validated. Delivered a superior product while eliminating millions in costs and demonstrating superiority in blind tests against competitors.  In the entire project, we only had one return, which was a module someone dropped in a solder bath and it blew up… I can’t prevent that

Laird Snowden

Laird Snowden