Joonyoung Cho is a highly accomplished Senior Director with extensive experience in wireless communications, modem algorithm design, and VLSI design. He has worked for major companies such as Samsung Electronics and Intel Corporation, as well as research organizations such as Pohang University of Science and Technology and Sk Telecom. Cho has a PhD in Electrical Engineering and has received over 200 patents in his field, with many more pending.

Throughout his career, Cho has conducted research and development on various wireless technologies such as LTE, HSUPA, DS-CDMA, and OFDM. He has also worked on antenna design, low power solutions, and embedded SIM, among other areas. As a former 3GPP RAN WG1 (PHY) delegate, he has developed expertise in PHY design, Heterogeneous Networks, Carrier Aggregation, Dynamic TDD, TDD-FDD hybrid, and UL-MIMO.

Aside from his wireless communication background, Cho has also worked on CDMA modem algorithm and design, including searcher, finger, carrier recovery, channel estimator, Rake receiver, and Tx filter. He has experience in VLSI design and circuit analysis, as well as RTL/gate/circuit/physical level design and simulation, and circuit-level simulator development.

Cho's expansive skill set and impressive background in wireless communications and VLSI design make him a valuable asset to any organization in the industry.